(1) Field of the Invention
The present invention generally relates to a binarizing circuit and a bar-code reader using it, and more particularly to a binarizing circuit for generating binary signals which are used to decode analog signals including coded signals obtained by reading of bar codes, and a bar-code reader using the binarizing circuit.
(2) Description of the Related Art
To prevent an erroneous reading of bar codes, it is standardized that a bar code is placed between marginal areas. Each of the marginal areas is white in color and has a predetermined length (e.g., 7 modules).
In a bar-code reader, reflected light from a medium on which a bar code is formed is detected by a detector and a signal output from the detector is amplified. The amplified signal is then binarized and decoded in accordance with a bar-code recognition logic. If an accurate binarization for the bar code (and the marginal area) is not executed, the bar code is not accurately read.
In a bar-code reader using a laser unit as a light source, since a readable depth of the laser beam is large, the reflected light has a large dynamic range. In this case, when an area having a large reflectance, such as the marginal areas, is scanned by a laser beam having a small spot size, fine roughness of the area causes noise in the detected signals.
Conventionally, to prevent errors from occurring in the binarization of the marginal areas by the noises in the detected signals, detected signals having levels lower than a predetermined level are not binarized.
In addition, in a bar-code reader, bar-code signals are processed by amplifier circuits and signal processing circuits, all of which are AC-coupled so as to have a relatively narrow frequency band. Thus, all signals including the predetermined level (a lower limit) used to prevent errors from occurring in the binarization of the marginal area are processed using AC components of the amplitude.
Even if there is no reflected light, outputs of the amplifiers and differential signals are varied caused by electrical noises. To prevent these electrical noises from affecting binarizing signals corresponding to the outputs of the amplifiers and the differential signals and to prevent binarizing signals from being affected from the noises corresponding to the fine roughness of a sheet, a lower limit is needed for the bar-code reader.
An example of a structure of the bar-code reader is shown in FIG. 1.
Referring to FIG. 1, a bar-code reader 11 has an optical scanner unit 12, a converging unit 13, a detector 14, a binarizing circuit 15, a bar-width counter 16, a decoding unit 17, a checking unit 18 and a determination unit 19. The optical scanner 12 has a light source and an optical system and outputs a scanning light beam used to scan a bar code 11. The converging unit 13 makes a reflected light beam from the bar code 11 which is scanned by the scanning light beam converge upon the detector 14. The detector 14 has a photodiode and converts the light beam into an electric signal. The electric signal is an infinitesimal signal, so that the electric signal output from the detector 14 is amplified and then supplied to the binarizing circuit 15. The binarizing circuit 15 converts the signal from the detector 14 into a binary signal having two levels: a high level (a logical value "1") and a low level (a logical value "0"). The binary signal is formed of pulses each of which occurs at a timing corresponding to a boundary portion between a white area and a black area of the bar code 11. The bar-width counter 16 performs a counting operation to measure intervals between pulses of the binary signal. The respective intervals correspond to widths of white and black areas of the bar code 11. Thus, the bar-width counter 16 outputs a count value corresponding to each of the widths of the white and black areas of the bar code 11. The decoding unit 17 decodes counting values, corresponding to the white and black areas of the bar code 11, from the bar-width counter 16 so as to generate data corresponding to the bar code 11.
The checking unit 18 checks the structure of the bar code 11 based on the count values from the bar-width counter 16. The checking unit 18 has a start margin detecting unit 18a, a guard bar detecting unit 18b, a character detecting unit 18c and an end margin detecting unit 18d. The respective units 18a, 18b, 18c and 18d of the checking unit 18 check the count values from the bar-counter 16 and detect a start margin portion, guard bars, a character portion and an end margin portion in the bar code 11. The determination unit 19 has a sequence controller 19a and a data output unit 19b. The sequence controller 19a outputs a control signal for permitting to output the data when the start margin detecting unit 18a, the guard bar detecting unit 18b, the character detecting unit 18c and the end margin detecting unit 18d obtain normal results. The data output unit 19b controls, in accordance with the control signal from the sequence controller 19a, whether the data from the decoding unit 17 is output as effective decoded data.
The binarizing circuit 15 is formed as shown in FIG. 2. Referring to FIG. 2, the binarizing circuit 15 has an AC amplifier 20, a differentiating circuit 21, an integrating circuit 22, a comparator 23 and an undefined pulse removing circuit 24. The AC amplifier 20 performs an AC amplification of the signals from the detector 14. The differentiating circuit 21 differentiates the signal output from the AC amplifier 20 and produces a differential signal. The integrating circuit 22 integrates the differential signal so as to output an integral signal which is slightly delayed from the differential signal. The comparator 23 compares the differential signal from the differentiating circuit 21 and the integral signal from the integrating circuit 22. The comparator 23 outputs a pulse signal having a high level when the level of the integral signal is greater than the level of the differential signal. The undefined pulse removing circuit 24 removes pulses from the pulse signal output from the comparator 23 in undefined periods in which the state of the pulse signal is undefined caused by noises.
The undefined pulse removing circuit 24 has a DC component detecting circuit 25, a peak-hold circuit 26, a discharging circuit 27, a lower limiter 28, a dividing circuit 29, a comparator 30, an inverting circuit 31, a comparator 32 and a gate circuit 33. The DC component detecting circuit 25 detects a DC level of the differential signal from the differentiating circuit 21. The peak-hold circuit 26 holds a peak level of the differential signal. The peak level held by the peak-hold circuit 26 is discharged through the discharging circuit 27 until an output level of the discharging circuit 27 reaches the DC level detected by the DC component detecting circuit 25. The lower limiter circuit 28 controls the level of the output signal of the discharging circuit 27 so that the level is not less than a lower limit level. The dividing circuit 29 divides the level of the output signal of the discharging circuit 27 and adds the divided level to the DC level detected by the DC component detecting circuit 25.
The comparator 30 compares the level of the output signal of the dividing circuit 29 and the level of the differential signal from the differentiating circuit 21. The comparator 30 outputs a white gate pulse signal. The white gate pulse signal has a low level when the level of the differential signal is less than the level of the output signal of the dividing circuit 29. The inverting circuit 31 inverts the level of the output signal of the dividing circuit 29 about the DC level detected by the DC component detecting circuit 25. The comparator 32 compares the level of the output signal of the inverting circuit 31 and the differential signal from the differentiating circuit 21 and outputs a black gate signal. The black gate signal has a low level when the level of the differential signal is greater than the level of the output signal of the inverting circuit 31. The gate circuit 33 receives the pulse signal (a binary signal) from the comparator 23, the white gate signal from the comparator 30 and the black gate signal from the comparator 32. When either the white gate pulse signal or the black gate pulse signal has a high level, the pulse signal from the comparator 23 passes through the gate circuit 33. When neither the white gate pulse signal nor the black gate pulse signal has the high level, the gate circuit 33 inhibits the pulse signal from the comparator 23 from passing through the gate circuit 33 so that the output signal of the gate circuit 33 is maintained, for example, at a low level.
A description will now be given of operations of the binarizing circuit 15.
When the scanning beam scans a label on which the bar code 11 is formed as shown in FIG. 3A, the detector 14 outputs the signal as shown in FIG. 3B. The signal output from the detector 14 has a high level corresponding to the reflected light on each white area having a high reflectance and a low level corresponding to the reflected light on each black area having a low reflectance. The intensity of the reflected light in the marginal areas S1 and S2 (white areas) is varied caused by the roughness there of and dirt on the surface. As a result, the signal output from the detector 14 has noises N1 and N2 corresponding to the variation of the reflected light in the marginal areas S1 and S2.
The signal output from the detector 14 as shown in FIG. 3B is AC-amplified by the AC amplifier 20 of the binarizing circuit 15, so that the AC amplifier 20 outputs a signal as shown in FIG. 3C. The signal output from the AC amplifier 20 is differentiated by the differentiating circuit 21, so that a differential signal (1) as shown in FIG. 3D is obtained. The differential signal (1) is supplied to the integrating circuit 22 and the undefined pulse removing circuit 24. When the differential signal (1) is integrated by the integrating circuit 22, the integrating circuit 22 outputs an integral signal (2) which is slightly delayed from the differential signal (1), as shown in FIG. 3E(a). The comparator 23 outputs a binary signal based on the comparison result of the differential signal (1) and the integral signal (2). When the differential signal (1) is less than the integral signal (2), the binary signal has the high level, and when the differential signal (1) is greater than the integral signal (2), the binary signal has the low level, as shown in FIG. 3E(b).
The binary signal output from the comparator 23 includes noise pulses which are obtained by the binarization of the noises N1 and N2 as shown in FIG. 3H. The undefined pulse removing circuit 24 removes the noise pulses from the binary signal output from the comparator 23. In the undefined pulse removing circuit 24, a peak level of the differential signal (1) is held by the peak-hold circuit 26. The peak level held by the peak-hold circuit 26 is then discharged by the discharging circuit 27 so that the output level of the discharging circuit 27 is gradually decreased. The output level of the discharging circuit 27 is divided by the dividing circuit 29, so that the dividing circuit 29 outputs a first slicing level (3) which is gradually decreased from half of the peak level of the differential signal (1), as shown in FIG. 3D. Further, the first slicing level (3) is inverted by the inverting circuit 31, so that the inverting circuit 31 outputs a second slicing level (3') as shown in FIG. 3D.
The output level of the discharging circuit 27 is controlled by the lower limiter 28 so that the output level is not less than a predetermined level. As a result, absolute values of the first slicing level (3) and the second slicing level (3') are controlled so as to be not less than the lower limit level. The lower limit level is set at a level which is slightly greater than levels of noises normally included in the differential signal (1) as shown in FIG. 3D
The comparator 30 compares the differential signal (1) and the first slicing level (3) and outputs the white gate pulse signal based on the comparison result. When the differential signal (1) is greater than the first slicing level (3), the white gate pulse has the high level, and when the differential signal (1) is less than the first slicing level (3), the white gate pulse has the low level, as shown in FIG. 3F. The comparator 32 compares the differential signal (1) and the second slicing level (3') and outputs the black gate pulse signal based on the comparison result. When the differential signal (1) is less than the second slicing level (3'), the black gate pulse signal has the high level, and when the differential signal (1) is greater than the second slicing level (3'), the black gate pulse signal has the low level, as shown in FIG. 3G. Since the lower limit level is greater than levels of noises normally included in the differential signal (1), the white gate pulse signal and the black gate pulse signal do not include noise pulses as shown in FIGS. 3F and 3G.
The gate circuit 33 includes logic gates such as AND gates. When the white gate pulse signal or the black gate pulse signal has the high level, the binary signal from the comparator 23 passes through the gate circuit 33. As a result, noise pulses included in the binary signal as shown in FIG. 3H are removed therefrom, so that the binary signal as shown in FIG. 3I is output from the gate circuit 33.
In the bar-code reader using the binarizing circuit 15 as described above, when an article on which a bar code 11 is formed is located far away from a reading window, the scanning beam is not focused on the surface of the article. In this case, the scanning beam has a large spot size BM1 on the surface of the article as shown in FIG. 4A so that the DC-level L1 of the detected signal is reduced as shown in FIG. 4B. When the DC-level of the detected signal is less than or equal to a predetermined level, peak levels of the differential signal corresponding to the bar code 11 are less than the slicing level which is limited to the lower limit level, as shown in FIG. 4C, so that the differential signal is not accurately binarized. In this case, to prevent the peak levels of the differential signal from being less than the slicing level, the lower limit level may be lowered.
On the other hand, when the scanning beam is focused on the surface of an article so as to have a small spot size BM2 on the surface of the article as shown in FIG. 5A, the DC-level L2 of the detected signal is increased as shown in FIG. 5B. In this case, noise levels caused by the roughness of marginal areas N1 and N2 (white in color) are large. If the lower limit level is lowered as in the above case, some of the noise levels may exceed the slicing level as shown in FIG. 3D (at a time to), so that the bar code 11 cannot be accurately read.
In addition, since the detected signal is AC-amplified, the waveform of the AC-amplified signal is deteriorated in a low frequency band in accordance with the frequency characteristic of the AC-amplifier. As a result, the slicing level is varied so that noises are binarized.